29.1
Circuit en Série R-L Transitoire
Dans un circuit en série résistance-inductance (R-L), la fermeture de l'interrupteur au début de la période simule un court-circuit triphasé, une cond…
Considérons un circuit série R-L.
Lorsque l’interrupteur se ferme à un temps égal à zéro, il imite un court-circuit triphasé dans une machine synchrone non chargée.
Étant donné une impédance de défaut nulle ou un défaut boulonné, et un courant initial nul, l’angle de la source détermine la tension initiale de la source.
L'équation KVL de ce circuit donne le courant de défaut asymétrique total et ses deux composantes.
Le courant de défaut CA, également appelé courant de défaut symétrique ou à l’état stationnaire, est une sinusoïde.
Le courant de décalage CC décroît de façon exponentielle avec une constante de temps comme rapport inductance/résistance.
Son amplitude varie avec l’angle de la source, culminant lorsque l’angle de la source est égal à thêta plus pi sur deux.
Le courant de défaut le plus important se produit à un angle de source spécifique.
Le courant de défaut asymétrique efficace avec décalage maximal en courant continu est ensuite calculé et simplifié en remplaçant la constante de temps et le temps en termes de cycles et de fréquence.
Ce courant est égal au courant de défaut alternatif efficace multiplié par un facteur d’asymétrie et le courant efficace diminue à mesure que tau augmente.
Des rapports réactance/résistance plus élevés produisent des valeurs de courant efficace plus élevées.
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Q1: What are the two main components of asymmetrical fault current in an R-L circuit?
Asymmetrical fault current consists of two components: the AC fault current (also called symmetrical or steady-state fault current), which follows a sinusoidal pattern, and the DC offset current, which decays exponentially over time. The DC offset's magnitude depends on the source angle and peaks at a specific phase angle. Together, these components determine the total fault current response when a switch closes in a series R-L circuit.
Q2: How does the DC offset current decay in a series R-L circuit?
The DC offset current decays exponentially with a time constant defined by the inductance-to-resistance ratio (L/R). The rate of decay depends directly on this ratio; higher inductance relative to resistance results in slower decay. The magnitude of the DC offset varies with the source angle, peaking when the source angle equals theta plus pi over two, which determines the maximum initial offset current.
Q3: What does a series R-L circuit model when the switch closes at time zero?
When the switch closes at time zero in a series R-L circuit with zero fault impedance and zero initial current, it simulates a three phase short circuit in an unloaded synchronous machine. The source voltage phase angle determines the initial voltage at the moment of switching. This setup allows engineers to analyze fault conditions and understand how circuit parameters affect the resulting fault current behavior.
Q4: How is the RMS asymmetrical fault current calculated?
The RMS asymmetrical fault current is calculated by multiplying the RMS AC fault current by an asymmetry factor that reflects the influence of the DC offset current. The calculation expresses the time constant and time in terms of cycles and frequency. As the time constant increases, the RMS current decreases, demonstrating that higher inductance-to-resistance ratios yield higher RMS current values.
Q5: What role does Kirchhoff's Voltage Law play in fault current analysis?
Kirchhoff's Voltage Law (KVL) is applied to the series R-L circuit to determine the total asymmetrical fault current and its two components. By analyzing the voltage equation across the resistor and inductor, engineers can derive expressions for both the AC and DC offset currents. This fundamental circuit analysis technique enables prediction of fault current magnitude and behavior under different source angle conditions.
Q6: Why does the maximum fault current occur at a specific source angle?
The magnitude of the DC offset current, which significantly contributes to the total asymmetrical fault current, varies with the source angle. The DC offset peaks when the source angle equals theta plus pi over two, resulting in the largest total fault current at this specific phase angle. Understanding this relationship helps engineers predict worst-case fault scenarios and design protective systems accordingly.
Q7: How does the reactance-to-resistance ratio affect RMS fault current?
Higher reactance-to-resistance ratios result in higher RMS asymmetrical fault current values. This ratio directly influences the time constant (L/R), which governs the decay rate of the DC offset component. Since the asymmetry factor depends on this time constant, circuits with greater inductance relative to resistance produce larger and more persistent fault currents, requiring more robust protective equipment.