Matriz de Impedância de Barramento

The bus impedance matrix is derived by solving nodal equations that incorporate the positive-sequence bus admittance matrix. In the first circuit of superposition analysis, all machine voltage sources are short-circuited, leaving only the prefault voltage source at the fault location. The matrix solution determines fault current and voltage at any bus in an N-bus power system.

The superposition method divides the fault analysis into two circuits: the first with machine sources short-circuited to find fault response, and the second representing prefault conditions where all voltages equal the prefault voltage. This separation allows engineers to isolate fault effects from normal operating conditions and accurately calculate subtransient fault currents in power systems.

Neglecting prefault load currents allows all synchronous machines to be represented by a single equivalent source with equal internal voltage sources. This simplification reduces computational complexity while maintaining accuracy for subtransient fault current calculations. Each bus initially has equal voltage, and closing the switch at the faulted bus reduces its voltage to zero.

Self-impedances represent the impedance seen from a specific bus, while mutual impedances represent coupling between different buses in the equivalent circuit. Together, they characterize how fault currents distribute throughout the power system and determine voltage drops at each bus during a three-phase short circuit event.

The positive-sequence network models three-phase faults by analyzing the symmetric fault condition using nodal equations and the bus impedance matrix. With a single voltage source at the faulted bus, the matrix solution provides fault current and voltage distribution. This approach accurately predicts system behavior during power system three-phase short circuits.

When a short circuit occurs at bus n, the voltage at that bus drops to zero while fault current flows through the system. The bus impedance matrix determines how this fault current distributes among other buses and the resulting voltage changes throughout the network, enabling engineers to assess system stability and design protective measures.

Accurate modeling of subtransient fault currents enables engineers to predict system disruptions, design robust protective equipment, and develop mitigation strategies. This analysis ensures continuous and stable operation of electrical networks by identifying potential damage risks and informing circuit breaker and equipment selection decisions.