A method for the growth of low temperature vertically-aligned carbon nanotubes, and the subsequent fabrication of vertical interconnect electrical test structures using semiconductor fabrication is presented.
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Method Article
A method for the growth of low temperature vertically-aligned carbon nanotubes, and the subsequent fabrication of vertical interconnect electrical test structures using semiconductor fabrication is presented.
We demonstrate a method for the low temperature growth (350 °C) of vertically-aligned carbon nanotubes (CNT) bundles on electrically conductive thin-films. Due to the low growth temperature, the process allows integration with modern low-κ dielectrics and some flexible substrates. The process is compatible with standard semiconductor fabrication, and a method for the fabrication of electrical 4-point probe test structures for vertical interconnect test structures is presented. Using scanning electron microscopy the morphology of the CNT bundles is investigated, which demonstrates vertical alignment of the CNT and can be used to tune the CNT growth time. With Raman spectroscopy the crystallinity of the CNT is investigated. It was found that the CNT have many defects, due to the low growth temperature. The electrical current-voltage measurements of the test vertical interconnects displays a linear response, indicating good ohmic contact was achieved between the CNT bundle and the top and bottom metal electrodes. The obtained resistivities of the CNT bundle are among the average values in the literature, while a record-low CNT growth temperature was used.
Copper and tungsten, the metals which are currently used for the interconnects in state-of-the-art very-large-scale integration (VLSI) technology, are approaching their physical limits in terms of reliability and electrical conductivity1. While down-scaling transistors generally improves their performance, it actually increases the resistance and current density of the interconnects. This resulted in interconnects dominating the integrated circuit (IC) performance in terms of delay and power consumption2.
Carbon nanotubes (CNT) have been suggested as alternative for Cu and W metallization, especially for vertical inter....
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Caution: Please consult all relevant material safety data sheets (MSDS) before use. Several of the chemicals used in this fabrication process are acutely toxic and carcinogenic. Nanomaterials may have additional hazards compared to their bulk counterpart. Please use all appropriate safety practices when working with equipment, chemicals or nanomaterials, including the use of engineering controls (fume hood) and personal protective equipment (safety glasses, gloves, cleanroom clothes).
1. Alignment Marker Definition for Lithography
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The design of the measurement structure used in this work can be found in Figure 1. By employing such a structure the measurement of the CNT bundle resistance and the metal-CNT contact resistances can be determined accurately, as probe and wire resistances are circumvented. The resistance of the bundle is a measure for the quality and density of the CNT bundle. In order to determine the contact resistance bundles of different lengths should be measured.
A typical SEM image of .......
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Figure 1 displays a schematic overview of the structure fabricated in this work, and which was used for the 4-point probe measurements. As the potential is measured through probes carrying no current, the exact potential drop (VH-VL) over the central CNT bundle and its contacts to the metal can be measured. Bigger diameter CNT bundles are used to contact the bottom TiN layer from the contact pads, in order to reduce the total resistance for the current forcing probes and maximize th.......
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The authors have nothing to disclose.
Part of the work has been performed in the project JEMSiP_3D, which is funded by the Public Authorities in France, Germany, Hungary, The Netherlands, Norway and Sweden, as well as by the ENIAC Joint Undertaking. The authors would like to thank the Dimes Technology Centre staff for processing support.
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| Name | Company | Catalog Number | Comments |
|---|---|---|---|
| Si (100) wafer 4" | International Wafer Service | Resisitivity: 2-5 mΩ-cm, thickness: 525 µm | |
| Ti-sputter target (99.995% purity) | Praxair | ||
| Al (1% Si)-sputter target (99.999% purity) | Praxair | ||
| Co (99.95% purity) | Kurt J. Lesker | ||
| SPR3012 positive photoresist | Dow Electronic Materials | ||
| MF-322 developer | Dow Electronic Materials | ||
| HNO3 (99.9%) | KMG Ultra Pure Chemicals | ||
| HNO3 (69.5%) | KMG Ultra Pure Chemicals | ||
| HF 0.55% | Honeywell | ||
| Tetrahydrofuran | JT Baker | ||
| Acetone | Sigma-Aldrich | ||
| ECI3027 positive photoresist | AZ | ||
| Tetraethyl orthosilicate (TEOS) | Praxair | ||
| N2 (99.9990%) | Praxair | ||
| O2 (99.9999%) | Praxair | ||
| CF4 (99.9970%) | Praxair | ||
| Cl2 (99.9900%) | Praxair | ||
| HBr (99.9950%) | Praxair | ||
| Ar (99.9990%) | Praxair | ||
| C2F6 (99.9990%) | Praxair | ||
| CHF3 (99.9950%) | Praxair | ||
| H2 (99.9950%) | Praxair | ||
| C2H2 (99.6000%) | Praxair | ||
| EVG 120 coater/developer | EVG | ||
| ASML PAS5500/80 waferstepper | ASML | ||
| SPTS Ωmega 201 plasma etcher | SPTS | Used for Si and metal etching | |
| SPTS Σigma sputter coater | SPTS | ||
| Novellus Concept One PECVD | LAM | ||
| Drytek 384T plasma etcher | LAM | Used for oxide etching | |
| CHA Solution e-beam evaporator | CHA | ||
| AIXTRON BlackMagic Pro CVD tool | AIXTRON | Carbon nanotube growth | |
| Philips XL50 scanning electron microscope | FEI | ||
| Tepla 300 | PVA TePla | Resist plasma stripper | |
| Avenger rinser dryer | Microporcess Technologies | ||
| Leitz MPV-SP reflecometer | Leitz | ||
| Renishaw inVia Raman spectroscope | Renishaw | ||
| Agilent 4156C parameter spectrum analyzer | Agilent | ||
| Cascade Microtech probe station | Cascade Microtech |
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