Name: Experimental Methods for Trapping Ions Using Microfabricated Surface Ion Traps (Video) | JoVE Journal
Uploaded: 2017-08-17T14:00:00.000+00:00
Duration: 11 min 45 s
Description: Learn microfabrication methods for trapping ytterbium ions using surface ion traps in quantum information processing. This protocol guides fabrication, vacuum setup, and laser alignment for successful ion trapping experiments.

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This research was partially supported by the Ministry of Science, ICT, and Future Planning (MSIP), Korea, under the Information Technology Research Center (ITRC) support program (IITP-2017-2015-0-00385) and the ICT R&#38;D program (10043464, Development of quantum repeater technology for the application to communication systems), supervised by the Institute for Information &#38; Communications Technology Promotion (IITP).

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The authors have nothing to disclose.

This paper presented a method for trapping ions using microfabricated surface ion traps. The construction of an ion trapping system requires experiences in various research fields but has not previously been described in detail. This paper provided detailed procedures for microfabricating a trap chip as well as for constructing an experimental setup to trap ions for the first time. This paper also provided detailed procedures for trapping 174Yb+ ions and experimenting with trapped ions.
A significant obstacle faced in the microfabrication procedures is the deposition of the dielectric layer, with a thickness of over 10 &#181;m. During the deposition process of the thick dielectric layer, residual stress can build up, which can cause damage to the dielectric film or even break the wafer. To reduce the residual stress, which is generally compressive, a slow deposition rate should be used40. In our case, a compressive stress of 110.4 MPa was measured with the deposition conditions of 540 sccm of SiH4 gas flow rate, 140 W of RF power, and 1.9 Torr of pressure at 5-&#181;m film thickness. However, these process conditions provide only a rough reference, since these conditions can vary significantly for different equipment. In order to reduce the effects of accumulated stress, 3.5 &#181;m-thick SiO2 films were deposited alternatingly on both sides of the wafer in the presented method. The required thickness of the dielectric layer can be reduced if a smaller RF voltage amplitude and hence a shallower trap depth is chosen. However, a shallower trap depth easily leads to the escape of trapped ions, so the fabrication of thicker dielectric layers, which can withstand higher RF voltages, is more desirable.
There are some limitations to the fabrication method presented in this paper. The lengths of the overhangs are not sufficient to completely hide the dielectric sidewalls from the trapped ions, as shown in Figure 7f. Furthermore, the sidewalls of the oxide pillars are jagged, increasing the exposed area of the dielectric sidewalls compared to the vertical oxide pillar. For example, in the case of the sidewall of the inner DC rail near the loading slot with a 5 &#181;m uniform overhang, it is calculated that 33% of the dielectric surface is exposed to the trapped ion position of the vertical sidewall. In the jagged-edge case, more than 70% of the sidewall area is exposed. These non-ideal fabrication results can induce additional stray fields from the exposed dielectrics, but the effects have not been quantitatively measured. Nevertheless, the fabricated chip as reported above has been successfully used in ion trapping and qubit manipulation experiments. In addition, the trap chip presented in this paper has exposed silicon sidewalls near the loading slot. Native oxide can grow on the silicon surfaces and can result in additional stray fields. Therefore, it is recommended to protect the silicon substrate with an additional metal layer, as in33.
To trap 174Yb+ ions, the frequencies of the lasers should be stabilized within a few tens of MHz, and a few different methods are discussed in advanced setups38,41. However, for the simple setup discussed in this paper, initial trapping is possible only with stabilization using a wavelength meter.
This paper provided a protocol to trap 174Yb+ ions using a microfabricated surface ion-trap chip. Although the protocol for trapping 171Yb+ ions is not specifically discussed, the experimental setup described in this paper can be also used to trap 171Yb+ ions and to manipulate the qubit state of the 171Yb+ ions to obtain Rabi oscillation results (shown in Figure 10). This can be done by adding several optical modulators to the output of the lasers and by using a microwave setup, as described in the Supplementary Document.
In conclusion, the experimental methods and results presented in this paper can be used to develop various quantum information applications using surface ion traps.

A Paul trap can confine charged particles, including ions in empty space, using a combination of a static electric field and a varying electric field oscillating at radio frequency (RF), and the quantum states of the ions confined in the trap can be measured and controlled1,2,3. Such ion traps were originally developed for precise measurement applications, including optical clocks and mass spectroscopy4,5,6. In recent years, these ion traps have also been actively explored as a physical platform to implement the quantum information processing attributed to the desirable characteristics of trapped ions, such as long coherence times, ideal isolation in an ultra-high vacuum (UHV) environment, and the feasibility of individual qubit manipulation7,8,9,10. Since Kielpinski et al.11 proposed a scalable ion-trap architecture that can be used to develop quantum computers, various types of surface traps, including junction traps12,13, multi-zone trap chips14, and 2-d array traps15,16,17, have been developed using semiconductor process-derived microfabrication methods18,19,20,21. Large-scale quantum information processing systems based on the surface traps have also been discussed22,23,24.
This paper presents experimental methods for trapping ions using microfabricated surface ion traps. More specifically, a procedure for fabricating surface ion traps and a detailed procedure for trapping ions using the fabricated traps are described. In addition, detailed descriptions of various practical techniques for setting up the experimental system and trapping ions are provided in the Supplementary Document.
The methodology for microfabricating a surface ion trap is given in step 1. Figure 1 shows a simplified schematic of a surface ion trap. The electric fields generated by the voltage applied to the electrodes in the transverse plane are also shown25. An RF voltage is applied to the pair of RF electrodes, while all other electrodes are kept at RF ground; the ponderomotive potential26 generated by the RF voltage confines the ions to the radial direction. The direct current (DC) voltage applied to the multiple DC electrodes outside the RF electrodes confine the ions to the longitudinal direction. The inner rails between the RF electrodes are designed to help tilt the principal axes of the total potential in the transverse plane. The methodology for designing a DC voltage set is included in the Supplementary Document. In addition, more details for designing the essential geometric parameters of surface ion-trap chips can be found in27,28,29,30,31.
The fabrication method introduced in step 1 was designed considering the following aspects. First, the dielectric layer between the electrode layer and the ground layer should be sufficiently thick to prevent electrical breakdown between the layers. Generally, the thickness should be over 10&#181;m. During the deposition of the thick dielectric layer, the residual stress from the deposited films can cause bowing of the substrate or damages to the deposited films. Thus, controlling the residual stress is one of the key techniques in the fabrication of the surface ion traps. Second, the exposure of the dielectric surfaces to the ion position should be minimized because stray charges can be induced on the dielectric material by scattered ultraviolet (UV) lasers, which in turn results in a random shift of ion position. The exposed area can be reduced by designing overhang electrode structures. It has been reported that surface ion traps with electrode overhangs are resistant to charging under typical experimental conditions32. Third, all the materials, including various deposited films, should be able to withstand 200 &#176;C baking for approximately 2 weeks, and the amount of outgassing from all materials should be compatible with UHV environments. The design of the surface ion-trap chips microfabricated in this paper is based on the trap design from33, which was successfully used in various experiments32,33,34,35. Note that this design includes a slot in the middle of the chip for loading neutral atoms, which are later photo-ionized for trapping.
After the fabrication of the ion-trap chip, the chip is mounted and electrically connected to the chip carrier using gold bonding wires. The chip carrier is then installed in a UHV chamber. A detailed procedure for preparing a trap chip package and the design of the UHV chamber are provided in the Supplementary Document.
Preparation of the optical and electrical equipment, as well as the experimental procedures for trapping ions, are explained in detail in step 2. The ions trapped by the ponderomotive potential are generally subject to the fluctuation of the surrounding electric field, which continuously increases the average kinetic energy of the ions. Laser cooling based on Doppler shift can be used to remove the excess energy from the motion of the ions. Figure 2 shows the simplified energy-level diagrams of a 174Yb+ ion and a neutral 174Yb atom. Doppler cooling of 174Yb+ ions requires a 369.5-nm laser and a 935-nm laser, while photo-ionization of neutral 174Yb atoms requires a 399-nm laser. Steps 2.2 and 2.3 describe an efficient method to align these lasers to the surface ion-trap chip and a procedure to find the proper conditions for photo-ionization. After the optical and electrical components are prepared, trapping ions is relatively straightforward. The experimental sequence for trapping ions is presented in step 2.4.

<table><tbody><tr><td>photoresist used for 2-&amp;mu;m spin coating</td><td>AZ Materials</td><td>AZ7220</td><td>Discontinued. Easily replaced by other alternative photoresist product.</td></tr><tr><td>photoresist used for 6-&amp;mu;m spin coating</td><td>AZ Materials</td><td>AZ4620</td><td>Discontinued. Easily replaced by other alternative photoresist product.</td></tr><tr><td>ceramic chip carrier</td><td>NTK</td><td>IPKX0F1-8180BA</td><td></td></tr><tr><td>epoxy compound</td><td>Epotek</td><td>353ND</td><td></td></tr><tr><td>Plasma enhanced chemical vapor deposition (PECVD) system</td><td>Oxford Instruments</td><td>PlasmaPro System100</td><td></td></tr><tr><td>Low pressure chemical vapor deposition (LPCVD) system</td><td>Centrotherm</td><td>E-1200</td><td></td></tr><tr><td>Furnace</td><td>Seltron</td><td>SHF-150</td><td></td></tr><tr><td>Sputter</td><td>Muhan Vacuum</td><td>MHS-1500</td><td></td></tr><tr><td>Manual aligner</td><td>Karl-Suss</td><td>MA-6</td><td></td></tr><tr><td>Deep Si etcher</td><td>Plasma-Therm</td><td>SLR-770-10R-B</td><td></td></tr><tr><td>Inductive coupled plasma (ICP) etcher</td><td>Oxford Instruments</td><td>PlasmaPro System100 Cobra</td><td></td></tr><tr><td>Reactive ion etching (RIE) etcher</td><td>Applied Materials</td><td>P-5000</td><td></td></tr><tr><td>Boundary element method (BEM) software</td><td>CPO Ltd.</td><td>Charged Particle Optics</td><td></td></tr><tr><td>Single crystaline (100) silicon wafer</td><td>STC</td><td>4SWP02</td><td>100 mm / (100) / P-type / SSP / 525&amp;plusmn;25 &amp;mu;m</td></tr><tr><td>metal tubes</td><td>Mcmaster-carr</td><td>89935K69</td><td>316 Stainless Steel Tubing, 0.042&quot; OD, 0.004&quot; Wall Thickness</td></tr><tr><td>Yb piece</td><td>Goodfellow</td><td>YB005110</td><td>Ytterbium wire, purity 99.9%</td></tr><tr><td>enriched &lt;sup&gt;171&lt;/sup&gt;Yb</td><td>Oak Ridge National Laboratory</td><td>Yb-171</td><td>https://www.isotopes.gov/catalog/product.php?element=Ytterbium</td></tr><tr><td>tantalum foil</td><td>The Nilaco Corporation</td><td>TI-453401</td><td>0.25x130x100mm 99.5%</td></tr><tr><td>Kapton-insulated copper wire</td><td>Accu-glass</td><td>18AWG (silver plated copper wire kapton insulted)</td><td></td></tr><tr><td>residual gas analyzer (RGA)</td><td>SRS</td><td>RGA200</td><td></td></tr><tr><td>turbo pump</td><td>Agilent</td><td>Twistorr84 FS</td><td></td></tr><tr><td>all-metal valve</td><td>KJL</td><td>manual SS All-Metal Angle Valves (CF flanged)</td><td></td></tr><tr><td>Leak detector (used as a rough pump)</td><td>Varian</td><td>PD03</td><td></td></tr><tr><td>ion gauges</td><td>Agilent</td><td>UHV-24p</td><td></td></tr><tr><td>ion pump</td><td>Agilent</td><td>VacIon Plus 20</td><td></td></tr><tr><td>NEG pump</td><td>SAES Getters</td><td>CapaciTorr D400</td><td></td></tr><tr><td>spherical octagon</td><td>Kimball Physics</td><td>MCF600-SphOct-F2C8</td><td></td></tr><tr><td>ZIF socket</td><td>Tactic Electronics</td><td>P/N 100-4680-002A</td><td></td></tr><tr><td>multi-pin feedthroughs</td><td>Accu-Glass</td><td>6-100531</td><td></td></tr><tr><td>25 D-sub gender adapters</td><td>Accu-Glass</td><td>104101</td><td></td></tr><tr><td>Recessed viewport</td><td>Culham Centre for Fusion Energy</td><td>100CF 316LN+20.9 Re-Entrant 316 (Custom order)</td><td>Disc material: 60cv Fused Silica 4mm THK, TWE Lambda 1/10, 20/10 Scratch-Dig</td></tr><tr><td>Recessed viewport AR coating</td><td>LaserOptik</td><td>AR355nm/0-6&amp;deg; HT370-650nm/0-36&amp;deg; on UHV (Custom order)</td><td>AR coating was performed in the middle of the fabrication of the recessed viewport</td></tr><tr><td>Digital-analog converter</td><td>AdLink</td><td>PCIe-6216V-GL</td><td></td></tr><tr><td>369.5nm laser</td><td>Toptica</td><td>TA-SHG Pro</td><td></td></tr><tr><td>369.5nm laser</td><td>Moglabs</td><td>ECD004 + 370LD10 + DLC102/HC</td><td></td></tr><tr><td>399nm laser</td><td>Toptica</td><td>DL 100</td><td></td></tr><tr><td>935nm laser</td><td>Toptica</td><td>DL 100</td><td></td></tr><tr><td>369.5nm &amp;amp; 399nm optical fiber</td><td>Coherent</td><td>NUV-320-K1</td><td>Patch cables are connectorized by Costal Connections.</td></tr><tr><td>935nm optical fiber</td><td>GouldFiber Optics</td><td>PSK-000626</td><td>50/50 fiber beam splitter made of Corning HI-780 single mode fiber to combine 935nm and 638nm together.</td></tr><tr><td>Wavelength meter</td><td>High Finesse</td><td>WSU-2</td><td></td></tr><tr><td>temporary mirror</td><td>Thorlabs</td><td>PF10-03-P01</td><td></td></tr><tr><td>Dichroic mirror</td><td>Semrock</td><td>FF647-SDi01-25x36</td><td></td></tr><tr><td>369.5nm &amp;amp; 399nm collimator</td><td>Micro Laser Systems</td><td>FC5-UV-T/A</td><td></td></tr><tr><td>935nm collimator</td><td>Sch&amp;auml;fter + Kirchhoff</td><td>60FC-0-M8-10</td><td></td></tr><tr><td>369.5nm focusing lens</td><td>CVI</td><td>PLCX-25.4-77.3-UV-355-399</td><td>Focal length: ~163mm @ 369.5nm</td></tr><tr><td>399nm &amp;amp; 935nm focusing lens</td><td>CVI</td><td>PLCX-25.4-64.4-UV-355-399</td><td>Focal length: ~137mm @ 399nm, ~143mm @ 935nm</td></tr><tr><td>imaging lens</td><td>Photon Gear</td><td>P/N 15470</td><td></td></tr><tr><td>369.5nm bandpass filter</td><td>Semrock</td><td>FF01-370/6-25</td><td></td></tr><tr><td>399nm bandpass filter</td><td>Semrock</td><td>FF01-395/11-25</td><td></td></tr><tr><td>IR filter</td><td>Semrock</td><td>FF01-650/SP-25</td><td></td></tr><tr><td>EMCCD camera</td><td>Andor Technology</td><td>DU-897U-CS0-EXF</td><td></td></tr><tr><td>PMT</td><td>Hamamatsu</td><td>H10682-210</td><td></td></tr></tbody></table>

experimental methods for trapping ions using microfabricated surface ion traps

Experimental Methods for Trapping Ions Using Microfabricated Surface Ion Traps

Ions trapped in a quadrupole Paul trap have been considered one of the strong physical candidates to implement quantum information processing. This is due to their long coherence time and their capability to manipulate and detect individual quantum bits (qubits). In more recent years, microfabricated surface ion traps have received more attention for large-scale integrated qubit platforms. This paper presents a microfabrication methodology for ion traps using micro-electro-mechanical system (MEMS) technology, including the fabrication method for a 14 &#181;m-thick dielectric layer and metal overhang structures atop the dielectric layer. In addition, an experimental procedure for trapping ytterbium (Yb) ions of isotope 174 (174Yb+) using 369.5 nm, 399 nm, and 935 nm diode lasers is described. These methodologies and procedures involve many scientific and engineering disciplines, and this paper first presents the detailed experimental procedures. The methods discussed in this paper can easily be extended to the trapping of Yb ions of isotope 171 (171Yb+) and to the manipulation of qubits.

Figure 7 shows the scanning electron micrographs (SEM) of the fabricated ion-trap chip. The RF electrodes, inner DC electrodes, outer DC electrodes, and loading slot were successfully fabricated. The sidewall profile of the dielectric pillar became jagged because the PECVD oxide was deposited in several steps. The multiple deposition steps were used to minimize the effects of residual stress from thick oxide films. This is further described in the Discussion.

Figure 8 shows the EMCCD image of five 174Yb+ ions trapped using the microfabricated ion-trap chip. The trapped ions can last for more than 24 h with continuous Doppler cooling. The number of trapped ions can be adjusted between 1 and 20 by changing the applied DC voltage set. This experimental setup is very reliable and robust and has currently been in operation for 50 months.
Figure 9 shows the shuttling of trapped ions along the axial direction. The ion position in Figure 9b is displaced from that in Figure 9a through the adjustment of the position of the DC potential minimum by changing the DC voltages.
Figure 10 shows preliminary results of Rabi oscillation experiments with a 171Yb+ ion. To obtain the results, the additional setups described in the Supplementary Document were used. The results were included to show a potential application of the experimental setup explained in this paper.
<img alt="Microfabricated ion trap schematic showing DC/RF electrode design for ion trapping and manipulation." class="xfigimg" src="/files/ftp_upload/56060/56060fig1.jpg" data-altupdatedat="1788250015000" data-alt="Figure 1"> 
Figure 1: Schematic of the surface ion trap. (a) The red dots represent the trapped ions. The brown and yellow electrodes indicate the RF and DC electrodes, respectively. The gray arrows show the direction of the electric field during the positive phase of the RF voltage. Note that the schematic is not drawn to scale. (b) The vertical dimensions of the electrode structure. (c) The lateral dimensions of the electrode structure. <a href="https://cloudflare.jove.com/files/ftp_upload/56060/56060fig1large.jpg" target="_blank">Please click here to view a larger version of this figure.</a>
<img alt="Energy level diagram showing atomic transitions with wavelengths 369.5 nm, 935.2 nm, 638.6 nm." class="xfigimg" src="/files/ftp_upload/56060/56060fig2.jpg" data-altupdatedat="1788250015000" data-alt="Figure 2"> 
Figure 2: Simplified energy-level diagrams of a 174Yb+ ion and a neutral 174Yb atom. (a) When a 369.5 nm laser is detuned to the red side (lower frequency) of the resonance, a cycling transition between 2P1/2 and 2S1/2 reduces the kinetic energy of the ion because of the Doppler effect. Occasionally, a small but finite branching ratio makes the electron decay from 2P1/2 to 2D3/2, and a 935-nm laser is required to return the electron back to the main cycling transition. The electron can also decay into a 2F7/2 state once per hour, on average, and a 638 nm laser can pump it out of the 2F7/2 state, but this is not necessary for a simple system38. The values in the ket notation represent the projections of the total angular momenta J along the quantization axis mJ. (b) To ionize neutral atoms evaporated from the oven, a two-photon absorption process was used39. A 399 nm laser excited an electron to 1P1 state, and the 369.5 nm photon for Doppler cooling had more energy than necessary to remove the excited electron from the ion. <a href="https://cloudflare.jove.com/files/ftp_upload/56060/56060fig2large.jpg" target="_blank">Please click here to view a larger version of this figure.</a>
<img alt="Semiconductor fabrication process diagram with thermal oxidation, Al deposition, SiO₂ patterning steps." class="xfigimg" src="/files/ftp_upload/56060/56060fig3.jpg" data-altupdatedat="1788250015000" data-alt="Figure 3"> 
Figure 3: Fabrication process flow of a surface ion trap. (a) Thermal oxidation to grow a 5,000 Å-thick SiO2 layer and LPCVD of a 2,000 Å-thick Si3N4 layer. (b) Deposition and ICP etching of a 1.5 µm-thick sputtered Al layer. (c) Deposition of a 14 µm-thick SiO2 layer on the both sides of the wafer using PECVD processes. (d) Patterning of the 14 µm-thick SiO2 layer deposited on the front of the wafer using an RIE process (e) Patterning of the 14 µm-thick SiO2 layer deposited on the back of the wafer using an RIE process. (f) Deposition of a 1.5 µm-thick sputtered Al layer and a 1 µm-thick PECVD SiO2 layer. (g) Patterning of the 1.5 µm-thick Al layer using an ICP process and the 1 µm-thick SiO2 layer using an RIE process. (h) Patterning of the 14 µm-thick SiO2 layer deposited on the front of the wafer using an RIE process. (i) Patterning of the 5,000 Å-thick SiO2 layer and the 2,000 Å-thick Si3N4 layer using an RIE process. (j) DRIE of the silicon substrate 450 µm from the back of the wafer. (k) Wet-etching of the SiO2 layer on the Al electrodes and the sidewalls of the dielectric pillars. (l) Penetration of the silicon substrate from the front through a DRIE process. Note that the schematics are not drawn to scale. <a href="https://cloudflare.jove.com/files/ftp_upload/56060/56060fig3large.jpg" target="_blank">Please click here to view a larger version of this figure.</a>
<img alt="Electrode voltage diagram, showing RF application for particle acceleration, ion beam analysis." class="xfigimg" src="/files/ftp_upload/56060/56060fig4.jpg" data-altupdatedat="1788250015000" data-alt="Figure 4"> 
Figure 4: An example of the DC voltage set used to trap ions. The voltages applied to the inner rails can compensate for the asymmetric electric field in the horizontal direction to tilt the principal axes of the total potential in the transverse plane. The axial trap frequency generated by the voltage set was 550 kHz. <a href="https://cloudflare.jove.com/files/ftp_upload/56060/56060fig4large.jpg" target="_blank">Please click here to view a larger version of this figure.</a>
<img alt="Laser spectroscopy setup diagram, showing optical path, dichroic mirrors, emission detection." class="xfigimg" src="/files/ftp_upload/56060/56060fig5v2.jpg" data-altupdatedat="1788250015000" data-alt="Figure 5"> 
Figure 5: Schematic of the optical setup. Three diode lasers are aligned to overlap at the trapping position. The recessed viewport of the UHV chamber allows the imaging lens to be placed as close as possible to the chip surface. A flip-mirror placed between the imaging lens and the EMCCD allows for the selective monitoring of the ion fluorescence using either a photon multiplied tube (PMT) or an EMCCD. <a href="https://cloudflare.jove.com/files/ftp_upload/56060/56060fig5v2large.jpg" target="_blank">Please click here to view a larger version of this figure.</a>
<img alt="Quantum optics lab setup; diagrams of coil assembly, beam paths, lens configuration, and detection." class="xfigimg" src="/files/ftp_upload/56060/56060fig6.jpg" data-altupdatedat="1788250015000" data-alt="Figure 6"> 
Figure 6: Images of the constructed optical setup. (a) A coil is wound around the front viewport of the chamber to generate a magnetic field, which can break degenerate energy levels of ytterbium ions. (b) The optical setup for steering the 399 nm and 935 nm beams. The red and green lines indicate the beam path of the 935 nm and 399 nm lasers, respectively. (c) The configuration of the imaging system, including the flip-mirror, the imaging lens, the EMCCD, and the PMT. The path of the fluorescence emitted from the trapped ions can be determined by the flip-mirror. The green and white arrows indicate the path of the fluorescence when being monitored by the EMCCD and the PMT, respectively. <a href="https://cloudflare.jove.com/files/ftp_upload/56060/56060fig6large.jpg" target="_blank">Please click here to view a larger version of this figure.</a>
<img alt="Microfabrication SEM diagrams of RF and DC rails, electrodes, bonding pads, illustrating structural setup." class="xfigimg" src="/files/ftp_upload/56060/56060fig7.jpg" data-altupdatedat="1788250015000" data-alt="Figure 7"> 
Figure 7: Fabrication results of the surface ion trap. (a) Overview of the chip layout. (b) A magnified view of the chip layout, which shows the multiple outer DC electrodes. (c) A magnified view of chip layout, which shows the loading slot. (d) A cross-sectional view of the trapping region before penetrating the loading slot. (e) A cross-sectional view of the trapping region after penetrating the loading slot. (f) A magnified cross-sectional view of the oxide pillar. The oxide pillars have jagged walls, and the lengths of the overhang are not sufficient, which is attributed to the non-uniform etch rate of the SiO2 at the interfaces between the separately deposited 3.5 µm-thick SiO2 layers. (g) A top view of a wire-bonding pad of a DC electrode. (h) A cross-sectional view of a via. Inclined profiles of the oxide pillars allow for the connection of the DC electrode and the ground layer during the deposition of the Al layer on the sidewall of the oxide pillar instead of filling the via holes with an electroplating process. <a href="https://cloudflare.jove.com/files/ftp_upload/56060/56060fig7large.jpg" target="_blank">Please click here to view a larger version of this figure.</a>
<img alt="Trapped Yb ions, 369.5-nm laser setup, intensity distribution, spectroscopy result, diagram." class="xfigimg" src="/files/ftp_upload/56060/56060fig8.jpg" data-altupdatedat="1788250015000" data-alt="Figure 8"> 
Figure 8: An EMCCD image of five 174Yb+ ions trapped on the microfabricated ion-trap chip. The image of the surface trap electrode structure was taken separately, and the images of the trapped ion and of the electrodes were combined for clarity. The intensity legend applies only to the pixels in the box. The thick arrow shows the beam path of the 369.5 nm laser and the thin arrows represent the x- and z-components of the momentum of the photon. <a href="https://cloudflare.jove.com/files/ftp_upload/56060/56060fig8large.jpg" target="_blank">Please click here to view a larger version of this figure.</a>
<img alt="Optical excitation diagram showing directional laser setup and intensity scale bar for fluorescence study." class="xfigimg" src="/files/ftp_upload/56060/56060fig9.jpg" data-altupdatedat="1788250015000" data-alt="Figure 9"> 
Figure 9: Adjustment of the axial potential of the trapped ions in a linear chain. (a) Seven ions at the center of the trap. (b) The ions were shuttled tens of micrometers. (c) The ion string squeezed in the axial direction. This figure is best viewed as a movie, which is separately uploaded. <a href="https://cloudflare.jove.com/files/ftp_upload/56060/56060fig9large.jpg" target="_blank">Please click here to view a larger version of this figure.</a>
<img alt="Quantum state transition graph; probability vs. time in Rabi oscillation; Bloch sphere phases." class="xfigimg" src="/files/ftp_upload/56060/56060fig10.jpg" data-altupdatedat="1788250015000" data-alt="Figure 10"> 
Figure 10: Experimental results of Rabi oscillations between the |0<img alt="Static equilibrium diagram; ΣFx=0, MA=0 equations; educational analysis tool." src="/files/ftp_upload/56060/56060img1.jpg" data-altupdatedat="1788250015000" data-alt="Image 1"> and |1<img alt="Static equilibrium diagram; ΣFx=0, MA=0 equations; educational analysis tool." src="/files/ftp_upload/56060/56060img1.jpg" data-altupdatedat="1788250015000" data-alt="Image 1"> states. |0<img alt="Static equilibrium diagram; ΣFx=0, MA=0 equations; educational analysis tool." src="/files/ftp_upload/56060/56060img1.jpg" data-altupdatedat="1788250015000" data-alt="Image 1"> is defined as the 2S1/2|F=0, mF=0<img alt="Static equilibrium diagram; ΣFx=0, MA=0 equations; educational analysis tool." src="/files/ftp_upload/56060/56060img1.jpg" data-altupdatedat="1788250015000" data-alt="Image 1"> state of the 171Yb+ ion, and |1<img alt="Static equilibrium diagram; ΣFx=0, MA=0 equations; educational analysis tool." src="/files/ftp_upload/56060/56060img1.jpg" data-altupdatedat="1788250015000" data-alt="Image 1"> is defined as the 2S1/2|F=1, mF=0<img alt="Static equilibrium diagram; ΣFx=0, MA=0 equations; educational analysis tool." src="/files/ftp_upload/56060/56060img1.jpg" data-altupdatedat="1788250015000" data-alt="Image 1"> state. The Rabi oscillation is induced by a 12.6428-GHz microwave. Bloch spheres above the plot show the corresponding quantum states at different times. <a href="https://cloudflare.jove.com/files/ftp_upload/56060/56060fig10large.jpg" target="_blank">Please click here to view a larger version of this figure.</a>
Supplementary Document: <a href="https://cloudflare.jove.com/files/ftp_upload/56060/jove-56060_Supplementary_Document.pdf" target="_blank">Please click here to download this document.</a>

This paper presents a microfabrication methodology for surface ion traps, as well as a detailed experimental procedure for trapping ytterbium ions in a room-temperature environment.

Ions trapped in a quadrupole Paul trap have been considered one of the strong physical candidates to implement quantum information processing. This is due ...

The overall goal of this procedure is to prepare and demonstrate an experimental set up for trapping ytterbium ions that includes a micro-fabricated chip. Ion trap technology has been considered as one of the leading candidates for physical implementation of quantum information processing. This procedure provides the detailed protocols for micro-fabricating a trapped chip as well as, for constructing an experimental set up, to trap ions, using the micro-fabricated trap chip.Ion trap systems developed by the micro-fabrication technology, provide great potential for quantum information processing and quantum computing. And the protocols presented here, will guide through the fabrication process and setting up ion trap experiments. Visual demonstration of this method is critical because it requires orchestration of various components such as, lasers, imaging systems, a vacuum chamber, electronics and micro-fabrication.To perform the experiment, one first needs to fabricate the surface ion trapped chip. This is an example of a chip mounted in a carrier that is used in this demonstration. The chip's features are represented in this schematic, there is a loading slot, through which neutral atoms are introduced.On either side of the loading slot, there are radio frequency electrodes to confine ions in directions perpendicular to the slot. DC voltages on the outer electrodes confined ions along this slot. DC voltages on the inner electrodes, help tilt the principle axis of the total potential.For the experiment, mount the packaged chip in an ultra high vacuum chamber. In this case, the chip is at the center of a spherical octagon chamber. The elements of the ultra high vacuum system are represented in this schematic overview.The ion pump and non-evaporative getter, can achieve pressures below 3 x 10 to the 11th Torr. The spherical octagon includes an oven ploated with the ytterbium atoms. The spherical octagon is represented at the center of this schematic of the final optical set up.The micro-fabricated chip is at the center of the octagon. Feed throughs allow electrical connections to the chip electrodes in the octagon's oven. The optical elements are arranged so that three diode lasers produce beams that overlap at the trapping position.A recessed view port in the spherical octagon, allows an imaging lens to be close to the chip's surface. Image the surface of the chip with an electron multiplying CCD camera. Connect multi channel cables to a digital to analog converter.Connect the other end of the multi channel cables to the feed throughs of the spherical octagon. In addition, make the appropriate feed through connections to a helical resonator. Next, work with the resonator, a spectrum analyser and a directional coupler.Connect the output of the RF generator to the output of the directional coupler. Then connect the input of the resonator, with the input port of the directional coupler. Connect the forward coupled port to the RF input of the spectrum analyser.Terminate the reverse coupled port, with a 50 ohm resistor. Now, prepare to adjust the helical resonator cap. Set the position of the helical resonator cap, then scan the frequencies of the generator, to identify the frequency at which the reflection is minimum.Continue to tune the resonator by adjusting the cap position. Meanwhile, monitor the frequency scan to find the frequency of the global minimum of reflected power. On finding the global minimum, lock the position of the resonator cap.Turn off the RF generator before continuing. To continue, have all the lasers in place, stabilized and blocked for safety. Unblock the 369.5 nanometer laser and collimate the beam.The beam should propagate toward the trapped chip. Align the beam parallel to the chip and almost touching its surface. Use a beam card, opposite the beam entry point to test the alignment, around spot, indicates that the beam does not reflect off any surface.Next, mount a focusing lens on a translation stage. Place the lens, so as to focus the beam near the trapping potential, still parallel to the chip surface. Move on to work with the imaging optics.Choose a high numerical aperture imaging lens mounted on a translation stage. Place this in front of the ultra high vacuum chambers recessed window. This is a schematic view of the set up with the imaging lens in place.Next, align the laser beam, so there is some scattering from the chip surface. Use a beam card as before to verify the beam is partially blocked. Move on to place the beam card near the image plane of the imaging lens.Adjust the imaging lens position with a translation stage. The new position should allow the scattered light to produce a sharp image on the beam card. Now, place an electron multiplying CCD on the translation stage in the imaging plane of the lens.In front of the CCD, place a bandpass filter to block background light. The electrodes should be visible, using the CCD and lens set up. Next, align the beam vertically so it will pass through the trapping potential.Then monitor the beam and move it towards the trap surface. Assume maximum beam scatter, means the beam center is on the chip surface. Now, use the lens translation stage to move the beam to the expected height of the trapping potential.After that adjustment, move the translation stages of the imaging lens and the CCD back by the same distance and note the position. This is the schematic view of the system at this point. The beam passes through the expected trap position.Continue after unblocking the other two lasers and begin aligning them. Replace the bandpass filter in front of the CCD, with a 399 nanometer bandpass filter. Then adjust the imaging lens and CCD positions to bring the electrodes into focus on the CCD.Align the collimated 399 nanometer beam, to enter the vacuum chamber, propagating in the opposite direction to the 369.5 nanometer beam and to overlap it. Introduce a mirror and dichroic mirror to combine the two beams so they co-propagate in the chamber. For testing, temporarily add a mirror to the beam path before the chamber and check beam overlap with a beam profiler.Introduce a focusing lens on a translation stage in the beam path between the dichroic and temporary mirrors. Use the beam profiler to check the focus of the two beams. In this case, the two lasers are not focused at the same point as they should be.Finally, align the 935 nanometer laser to bring the lasers into coincidence. Once this is done, remove the temporary mirror and be certain the 399 nanometer beam can be observed in the CCD. Vertically align the beam with the expected trap position and then move the beam toward the chip.Monitor the CCD image and associate the maximum intensity of scattered light, with the beam being centered on the chip surface. Then move the beam from the surface to the expected position of the trap. Follow this by moving the imaging lens and CCD back the same distance.Then, set the 399 nanometer laser close to the appropriate ytterbium 174 transition. Monitor the CCD image as the oven with ytterbium is turned on and the current is increased. Do this while sweeping the laser through the ytterbium resonance, to identify the start of evaporation, by observing fluorescence.Note the current value just before fluorescence and turn the oven off. Make the final preparation for trapping ions. Return to the bandpass filter at the CCD and replace it with a 369.5 nanometer bandpass filter.In addition, adjust the CCD and imaging lens positions for the 368.5 nanometer focus. Set the voltages for the digital to analog converter controlling the electrodes. Then go to the RF generator attached to the helical resonator.Turn on the generator at a very low power setting and gradually increase the output power. At the laser control computer, set the laser frequencies and oven current source to their appropriate values. After a few minutes, briefly block the 935 nanometer laser for one to two seconds to start a test for trapping.View the trap with the CCD. If ions are trapped, the scattering rate drop significantly and the image is noticeably affected. Block the laser a few times to check the blocking correlates with image changes.Once ions are trapped, turn off the oven. This composite of electron multiplying CCD images, suggests the location of five ytterbium 174 1+ions trapped in a micro-fabricated ion trap chip. The number of trapped ions can be varied by changing the applied DC voltages.In this video of trapped ions, the ions are being manipulated by varying the DC voltages of the trap. The protocols for fabricating surface ion traps and trapping ytterbium 174 isotope ions, were presented in this video. This procedure can be easily extended to trap ytterbium ions of isotope 171 and manipulate cubic stage, ultimately moving towards quantum information processing and quantum computing.

experimental-methods-for-trapping-ions-using-microfabricated-surface

Research

JoVE Journal

Engineering

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A Microfluidic-based Hydrodynamic Trap for Single Particles

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On-chip Isotachophoresis for Separation of Ions and Purification of Nucleic Acids

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Optical Trapping of Nanoparticles

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In Situ SIMS and IR Spectroscopy of Well-defined Surfaces Prepared by Soft Landing of Mass-selected Ions

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Measurement of Extracellular Ion Fluxes Using the Ion-selective Self-referencing Microelectrode Technique

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Real-time Iontophoresis with Tetramethylammonium to Quantify Volume Fraction and Tortuosity of Brain Extracellular Space

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Learn microfabrication methods for trapping ytterbium ions using surface ion traps in quantum information processing. This protocol guides fabrication, vacuum setup, and laser alignment for successful ion trapping experiments.

Experimental Methods for Trapping Ions Using Microfabricated Surface Ion Traps

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