This study presents a computational framework for autonomous multi-scale design of optoelectronic nanoelectronic devices using graph-based machine learning. The dataset consists of approximately 120,000 atomic-scale graphs, 35,000 mesoscopic-scale graphs, and 12,000 device-level graphs generated from physics-based simulations, each annotated with structural descriptors and reference energy values. Devices are represented as hierarchical graphs spanning atomic, mesoscopic, and device levels, with nodes encoding material or functional units and edges encoding physical interactions. Three scale-specific Graph Neural Networks (GNNs) are implemented using a PyTorch and PyTorch Geometric pipeline, with four message-passing layers per scale and cross-scale attention-based feature fusion. Quantum behavior is incorporated through a GNN-parameterized effective Hamiltonian, trained to approximate reference tight-binding and DFT-inspired energy spectra using a physics-regularized loss function. Device topology evolution is formulated as a constrained reinforcement learning problem in which graph modifications are treated as actions and optimized using a policy-gradient method with entropy regularization. A composite reward function balances internal quantum efficiency, structural stability, and graph complexity under physical feasibility constraints. Multi-objective optimization is performed using an augmented Lagrangian formulation to identify Pareto-consistent device configurations. Model evaluation includes energy prediction accuracy (MAE/RMSE), constraint violation rate, topology feasibility, and scalability analysis on graphs up to 106 nodes. Selected designs are further validated using finite-element multiphysics simulations to verify optical and electrical consistency. This protocol provides a reproducible, multi-scale computational pipeline for physics-constrained autonomous nanoelectronic device design.