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Method Article

Flow-assisted Dielectrophoresis: A Low Cost Method for the Fabrication of High Performance Solution-processable Nanowire Devices

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DOI:

10.3791/56408

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December 7th, 2017

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In This Article

Summary

In this paper, flow assisted dielectrophoresis is demonstrated for the self-assembly of nanowire devices. The fabrication of a silicon nanowire field effect transistor is shown as an example.

Abstract

Flow-assisted dielectrophoresis (DEP) is an efficient self-assembly method for the controllable and reproducible positioning, alignment, and selection of nanowires. DEP is used for nanowire analysis, characterization, and for solution-based fabrication of semiconducting devices. The method works by applying an alternating electric field between metallic electrodes. The nanowire formulation is then dropped onto the electrodes which are on an inclined surface to create a flow of the formulation using gravity. The nanowires then align along the gradient of the electric field and in the direction of the liquid flow. The frequency of the field can be adjusted to select nanowires with superior conductivity and lower trap density.

In this work, flow-assisted DEP is used to create nanowire field effect transistors. Flow-assisted DEP has several advantages: it allows selection of nanowire electrical properties; control of nanowire length; placement of nanowires in specific areas; control of orientation of nanowires; and control of nanowire density in the device.

The technique can be expanded to many other applications such as gas sensors and microwave switches. The technique is efficient, quick, reproducible, and it uses a minimal amount of dilute solution making it ideal for the testing of novel nanomaterials. Wafer scale assembly of nanowire devices can also be achieved using this technique, allowing large numbers of samples for testing and large-area electronic applications.

Introduction

Controllable and reproducible assembly of nanoparticles in pre-defined substrate locations is one of the main challenges in solution-processed electronic and photonic devices utilizing semiconducting or conducting nanoparticles. For high performance devices, it is also highly beneficial to be able to select nanoparticles with preferential sizes, and particular electronic properties, including, for example, high conductivity and low density of surface trap states. Despite significant progress in nanomaterials growth, including nanowire and nanotube materials, some variations of nanoparticle properties are always present, and a selection step can significantly improve n....

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Protocol

Caution: All procedures unless otherwise stated take place in a clean room environment and risk assessments have been done to ensure safety during nanowires and chemicals handling. Nanomaterials may have a number of health implications which are as of yet unknown, and so should be handled with appropriate care21.

NOTE: The process starts with the preparation of the substrates, followed by the first photolithography and metal deposition steps to define the DEP contacts. The nanowires are then assembled via DEP and a further optional photolithographic and metal deposition step can be performed to deposit top contacts o....

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Results

Bilayer photolithography results in clean sharply defined electrodes. In the example (Figure 1A), inter-digitated finger structure was used with a channel length of 10 µm. These structures allow a large area to assemble the maximum number of nanowires when the DEP force is applied. Figure 1B shows a schematic of a bottom-gate nanowire FET device.

Incorrect nanowire disp.......

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Discussion

The successful fabrication and performance of the devices depend on several key factors. These include nanowire density and distribution in the formulation, the choice of solvent, the frequency of DEP, and the control of the number of nanowires present on the device electrodes1.

One of the critical steps in achieving repeatable working devices is the preparation of a nanowire formulation without clusters or clumps. The formulation can be sonicated before DEP to reduce t.......

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Disclosures

The authors confirm that there are no conflicts of interest.

Acknowledgements

The authors would like to thank ESPRC and BAE systems for financial support, and Prof. Brian A. Korgel and his group for the supply of SFLS grown silicon nanowires used in this work.

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Materials

List of materials used in this article
NameCompanyCatalog NumberComments
Silicon/silicon dioxide wafer, CZ method growth, 100mm diameter,  300 nm oxide thermal growth,  n-doped phosphorusSi-Mat (Silicon materials)-http://si-mat.com/
Acetone (200ml)Sigma AldrichW332615-
Isopropanol (200ml)Sigma AldrichW292907-
Deionised water (150ml)On site supply--
Photoresist (A) SF6 PMGI under etch photoresit (approx 1 ml per sample)Microchem -http://microchem.com/pdf/PMGI-Resists-data-sheetV-rhcedit-102206.pdf
Photoresist (B) S1805 photoresit) (approx 1 ml per sample)Microchem -http://www.microchem.com/PDFs_Dow/S1800.pdf
Photoresist developer Microposit  MF319  (100ml)Microchem -http://microchem.com/products/images/uploads/MF_319_Data_Sheet.pdf
Photoresist remover Microposit remover 1165 (300ml (2 baths 150 each))Microchem -http://micromaterialstech.com/wp-content/dow_electronic_materials/datasheets/1165_Remover.pdf

References

  1. Constantinou, M., Rigas, G. P., et al. Simultaneous Tunable Selection and Self-Assembly of Si Nanowires from Heterogeneous Feedstock. ACS Nano. , (2016).
  2. Constantinou, M., Hoettges, K. F., et al. Rapid determination of nanowires electrical properties using a dielectrophoresis-well based system. App. Phy. Lett. 110 (13), ....

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