Silica Wafer Fabrication
Silica Wafer Fabrication - Related Videos
07:51
Fabrication of Silica Ultra High Quality Factor Microresonators
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Cited by 22 •
2012
We describe the use of a carbon dioxide laser reflow technique to fabricate silica resonant cavities, including free-standing microspheres and on-chip microtoroids. The reflow method removes surface imperfections, allowing long photon lifetimes within both devices. The resulting devices have ultra high quality factors, enabling applications ranging from telecommunications to biodetection.
10:32
Fabrication of Uniform Nanoscale Cavities via Silicon Direct Wafer Bonding
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Cited by 2 •
2014
A method for permanently bonding two silicon wafers so as to realize a uniform enclosure is described. This includes wafer preparation, cleaning, RT bonding, and annealing processes. The resulting bonded wafers (cells) have uniformity of enclosure ~1%1,2. The resulting geometry allows for measurements of confined liquids and gasses.
09:43
Preparation of Silica Nanoparticles Through Microwave-assisted Acid-catalysis
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Cited by 11 •
2013
Silica nanoparticles were prepared using acid-catalysis of a siloxane precursor and microwave-assisted synthetic techniques resulting in the controlled growth of nanomaterials ranging from 30-250 nm in diameter. The growth dynamics can be controlled by varying the initial silicic acid concentration, time of the reaction, and temperature of reaction.
13:00
Low Molecular Weight Protein Enrichment on Mesoporous Silica Thin Films for Biomarker Discovery
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Cited by 11 •
2012
We developed a technology based on mesoporous silica thin film for the selective recovery of low molecular weight proteins and peptides from human serum. The physico-chemical properties of our mesoporous chips were finely tuned to provide substantial control in peptide enrichment and consequently profile the serum proteome for diagnostic purposes.
07:36
Fabricating Nanogaps by Nanoskiving
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Cited by 3 •
2013
The fabrication of electrically addressable, high-aspect-ratio (> 1000:1) metal nanowires separated by gaps of single nanometers using either sacrificial layers of aluminum and silver or self-assembled monolayers as templates is described. These nanogap structures are fabricated without a clean room or any photo- or electron-beam lithographic processes by a form of edge lithography known as nanoskiving.
FAQs
High purity helps preserve the stable behavior expected from fused silica during research and manufacturing. Limiting contamination supports controlled surface conditions and reliable performance when wafers serve as substrates for semiconductor processing, optical devices, microfluidics, or laboratory instrumentation. This requirement connects material preparation directly to the accuracy, consistency, and suitability of the finished wafer.
Thermal stability, chemical resistance, electrical insulation, and optical transparency determine where these wafers are useful. Together, these properties allow a substrate to tolerate demanding processing conditions while supporting optical measurements, electrically isolated structures, or chemically exposed microfluidic systems. Engineers therefore select the material not only for flatness, but also for how its physical behavior matches the intended device or instrument.
Thickness, surface roughness, flatness, and contamination control are central quality characteristics. Thickness and flatness support precise integration with later fabrication steps, while surface roughness affects the uniformity of the working surface. Cleaning and inspection address contamination and verify whether the wafer meets the required condition, making these measurements and controls important links between processing and reliable use.
The workflow begins by forming high-purity silica into a bulk material and then sectioning that material into wafers. Subsequent lapping and polishing refine the wafer geometry and surface, while cleaning removes unwanted contamination. Inspection follows to assess characteristics such as thickness, surface roughness, and cleanliness. Each stage progressively prepares the substrate for precise research or manufacturing applications.
Lapping and polishing are separate refinement stages with related but distinct roles in preparing the wafer surface. Lapping contributes to controlling the wafer’s form and thickness, whereas polishing further improves surface quality and reduces roughness. Using both operations allows fabrication to address overall geometry and fine surface condition before cleaning and inspection determine whether the result is suitable.
Silica wafers support several areas that require a stable, carefully prepared substrate. Semiconductor processing benefits from electrical insulation and thermal stability; optical devices use optical transparency; and microfluidics can take advantage of chemical resistance. Laboratory instrumentation also uses these wafers where controlled surfaces and reliable material behavior help support precise fabrication or measurement.