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Theoretical Calculation and Experimental Verification for Dislocation Reduction in Germanium Epitaxial Layers with Semicylindrical Voids on Silicon

Article DOI: 10.3791/58897-v • 06:57 min • July 17th, 2020
July 17th, 2020 •
1, 2, 1, 1,3
1Department of Materials Engineering, The University of Tokyo, 2Department of Electrical and Electronic Information Engineering, Toyohashi University of Technology, 3Department of Materials Science and Engineering, Massachusetts Institute of Technology

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Theoretical calculation and experimental verification are proposed for a reduction of threading dislocation (TD) density in germanium epitaxial layers with semicylindrical voids on silicon. Calculations based on the interaction of TDs and surface via image force, TD measurements, and transmission electron microscope observations of TDs are presented.

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Theoretical Calculation Experimental Verification Dislocation Reduction Germanium Epitaxial Layers Semicylindrical Voids Silicon High-performance Silicon Photonic Chips Dislocation Sinks Threading Dislocation Density Mohammed Faiz Master Student Germanium Growth Areas Design File Line And Space Patterns Square Shaped Silicon Window Areas Selective Epitaxial Growth Mask Boron-doped P-silicon Substrates Resistivity Tube Furnace Nitrogen Gas Annealing Temperature Dry Oxygen Valve Surfactant
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