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Method Article

Laser-induced Forward Transfer for Flip-chip Packaging of Single Dies

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DOI:

10.3791/52623

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March 20th, 2015

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In This Article

Summary

We demonstrate the use of the Laser-induced Forward Transfer (LIFT) technique for flip-chip assembly of optoelectronic components. This approach provides a simple, cost-effective, low-temperature, fast and flexible solution for fine-pitch bumping and bonding on chip-scale for achieving high-density circuits for optoelectronic applications.

Abstract

Flip-chip (FC) packaging is a key technology for realizing high performance, ultra-miniaturized and high-density circuits in the micro-electronics industry. In this technique the chip and/or the substrate is bumped and the two are bonded via these conductive bumps. Many bumping techniques have been developed and intensively investigated since the introduction of the FC technology in 19601 such as stencil printing, stud bumping, evaporation and electroless/electroplating2. Despite the progress that these methods have made they all suffer from one or more than one drawbacks that need to be addressed such as cost, complex processing steps, high processing temperatures, manufacturing time and most importantly the lack of flexibility. In this paper, we demonstrate a simple and cost-effective laser-based bump forming technique known as Laser-induced Forward Transfer (LIFT)3. Using the LIFT technique a wide range of bump materials can be printed in a single-step with great flexibility, high speed and accuracy at RT. In addition, LIFT enables the bumping and bonding down to chip-scale, which is critical for fabricating ultra-miniature circuitry.

Introduction

Laser-induced Forward Transfer (LIFT) is a versatile direct-write additive manufacturing method for single-step pattern definition and material transfer with micron and sub-micron-resolution. In this paper, we report the use of LIFT as a bumping technique for flip-chip packaging of vertical-cavity surface-emitting lasers (VCSELs) on a chip-scale. Flip-chip is a key technology in system packaging and integration of electronic and optoelectronic (OE) components. In order to achieve dense integration of components fine pitch bonding is essential. Although fine pitch bonding has been demonstrated by some of the standard techniques but there is a void in terms of combining....

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Protocol

1. LIFT-assisted Flip-chip Bonding

NOTE: There are three stages involved in realizing the LIFT-assisted flip-chip assemblies, namely-micro-bumping of the substrates using the LIFT technique, attaching the optoelectronic chips to the bumped substrates using thermo-compression flip-chip bonding method, and finally encapsulation of the bonded assemblies. Each of these stages is discussed in the following sections:

  1. Micro-bumping using LIFT:
    1. For donor preparation, deposit a thin film of the donor material onto a laser-transparent carrier substrate. For this experiment, evaporate a 200 nm thick film of indium metal on top ....

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Results

Figure 7 shows a typical LIV curve that was recorded from one of the many flip-chip bonded VCSEL chips. A good match between the measured optical power to the supplier quoted values indicated successful functioning of the bonded devices post-bonding. The curves were also recorded prior- and post-encapsulation and upon comparison it was verified that the encapsulant had no affect on the chip functionality (as shown in Figure 7). Also, a comparison between the I-V curves recorded for the f.......

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Discussion

In this paper, we have demonstrated thermo-compression flip-chip bonding of single VCSEL chips using a laser based direct-write technique called LIFT. The assembly fabrication steps involved printing of the micro-bumps of indium onto the substrate contact pads using the LIFT technique. This was followed by thermo-compression flip-chip bonding of VCSEL chips to the bumped substrates and finally their encapsulation.

Electrical, optical and mechanical reliability of the LIFT-assisted bonded chips.......

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Disclosures

The authors have nothing to disclose.

Acknowledgements

This work was carried out in the framework of the project “MIRAGE,” funded by the European Commission within the FP7 program.

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Materials

List of materials used in this article
NameCompanyCatalog NumberComments
Laser source3D MicroMac (3DMM)2912-295
PhotodetectorNewport 818 series
Source measurement unitKeithley 2401
Power meterNewport 1930
UnderfillNorlandsNOA 86
UV lampOmnicureSeries 1000 UV
Probe stationCascade Microtechmodel 42
Flip-chip bonderDr. TreskyT-320 X

References

  1. Davis, E., Harding, W., Schwartz, R., Coring, J. Solid logic technology: versatile, high performance microelectronics. IBM J. Res. Develop. 8, 102-114 (1964).
  2. Bigas, M., Cabruja, E., Lozano, M. Bonding techniques for hybrid active pixel sensors (HAPS).

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