Engineering
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Electric-field Control of Electronic States in WS2 Nanodevices by Electrolyte Gating
Chapters
Summary April 12th, 2018
Here, we present a protocol to control the carrier number in solids by using the electrolyte.
Transcript
The overall goal of this procedure is to use electrolyte gating to control the carrier number and achieve electric-field-induced quantum phase transitions in tungsten disulfide transistors. This technique provides a powerful strategy for achieving quantum phase transitions, including electric-field-induced superconductivity. The main advantage of this technique is that strong electric field can be generated even under low bias voltage, inducing large carrier density by electrostatic or electrochemical doping.
To begin preparing the nanotube dispersion, combine about 0.8 milligrams of tungsten disulfide nanotubes with eight milliliters of isopropyl alcohol. Sonicate the mixture for 20 minutes to disperse the nanotube powder in the isopropyl alcohol. To avoid heating the suspension, rest it for one minute after every five minutes of sonication.
Next, turn on a spin-coater and its attached vacuum pump. Place a clean silicon/silicon dioxide substrate at the center of the vacuum chuck, and fix it in place. Apply the 0.1 milligram per milliliter tungsten disulfide nanotube suspension to the substrate in drops until the substrate surface is completely covered.
Spin-coat the substrate at 4, 000 rpm for 50 seconds. To begin preparing the tungsten disulfide flakes, place a small bulk sample of tungsten disulfide on the adhesive side of silicone-free adhesive tape. Carefully fold and unfold the tape to mechanically exfoliate a thin layer of tungsten disulfide from the bulk.
Continue folding and unfolding the tape until the exfoliated sample covers the tape as a thin layer. Then, gently apply the tape to the silicon dioxide face of a clean silicon/silicon dioxide substrate. Apply light pressure to the tape to transfer the tungsten disulfide flakes to the substrate.
Carefully separate the tape from the substrate, leaving the substrate surface coated with thin tungsten disulfide flakes. To begin device fabrication, place a silicon/silicon dioxide substrate coated with tungsten disulfide nanotubes or thin flakes on the center of a spin-coater vacuum chuck. Apply drops of PMMA to the substrate until its surface is covered.
Spin-coat the substrate at 4, 000 rpm for 50 seconds to uniformly coat the substrate with PMMA, thereby protecting the tungsten disulfide nanotubes or flakes from exposure to air. Heat the PMMA-coated substrate at 180 degrees Celsius for one minute. Next, place the substrate on the stage of an optical microscope equipped with a camera.
Inspect the substrate at 20X magnification, and identify six to 10 isolated tungsten disulfide samples of suitable size. Take pictures of each isolated sample at 5X, 20X, and 100X magnification. Then, open CAD software, and load the substrate lattice format.
Import the pictures of the samples, and determine the size and location of each picture from the marks on the substrate. Draw a 1, 200-micrometer square and a 300-micrometer square around each sample. Design large-scale patterns including gate, source, drain, and other pads in each large square, excluding fine structures near the samples.
Add marks in each small square for precise identification of the sample locations. When patterns have been designed for all samples, delete all but the patterns and marks. Export the patterns and marks as DXF files.
Next, place the substrate on the sample stage of an electron beam lithography instrument. Insert the sample stage into the main chamber, and begin evacuating the chamber. Convert the DXF file of small marks to a cell file.
Mark the file for electron beam lithography, and save the file in the con format for the electron beam lithography instrument. Once the main chamber pressure is below five times 10 to the negative five pascals, open the instrument software and turn on the electron gun. Pattern the substrate with the small marks.
Then, patten the substrate with the larger designs using the same process. When the lithography is complete, turn off the electron beam and quit the software. Vent the main chamber, and remove the patterned substrate.
Develop the substrate by immersion in a one-to-three mixture of methyl isobutyl ketone and isopropyl alcohol for 30 seconds. Wash the substrate with isopropyl alcohol, and dry the developed substrate with a nitrogen gun. Take another set of pictures of each sample at 5X, 20X, and 100X magnification.
Import the images into CAD software. Locate the images by designed small markers. Then, design the fine structure of the device.
Pattern the substrate with electron beam lithography, develop, and dry the substrate. To begin the electrode deposition process, fix the patterned substrate on a vapor deposition substrate holder. Attach the substrate holder to a transfer rod, and evacuate the chamber.
Then, insert the substrate into the main chamber of the evaporator. Start rotating the substrate holder. Evacuate the main chamber.
Open the shutter, and deposit five nanometers of chromium as the initial adhesion layer. Then, ramp the current to 30 ampere. Evaporate gold with suitable deposition rate and thickness.
Close the shutter to end deposition. Slowly reduce the current to zero, and turn off the current source. Then, stop the substrate holder rotation.
Allow the substrate to rest in the chamber for one hour to cool to room temperature before removing it. Next, cover the pads and gate electrodes with tape, taking care to expose the fine structures of the device. Deposit a 20-nanometer silicon dioxide layer to protect the electrodes during electrolyte gating.
Following electrode deposition, separate the devices by dicing the substrate into small pieces. Immerse one device in acetone for one hour at room temperature to remove residual PMMA and gold. Then, wash the device with isopropyl alcohol, and dry it with a nitrogen gun.
Fix the device on a chip carrier with conductive silver paste. Wire-bond each electrode pad to an electrode on the chip carrier with 25-micrometer-thick gold wires. Next, dip a pair of tweezers in an electrolyte solution.
Carefully apply the electrolyte to the fine structure of the device and the gate pad without covering the electrode pads. Then, fix the chip carrier on the measurement system sample holder. Use the transfer rod to insert the sample holder into the system.
Evacuate the chamber to high vacuum conditions. Use measurement software to perform transport measurements. Ambipolar transfer curves were observed for both the tungsten disulfide nanotube and flake devices.
The ambipolar behavior was reversible and repeatable, suggesting that these operations resulted from electrostatic doping. The source-drain current of a tungsten disulfide nanotube device was examined as a function of gate voltage and waiting time. The initial saturation behavior indicated electrostatic doping.
Electrochemical doping was observed at higher gate voltages. The dramatic increase in source-drain current when the gate voltage was held at eight volts for several minutes indicated intercalation of potassium ions into the tungsten disulfide layers without damaging the crystal structure. A similar gate response was observed for tungsten disulfide flake devices.
Saturation behavior occurred as the gate voltage was increased to six volts, but no significant change in carrier density was observed. This behavior was indicative of electrostatic doping. The source-drain current and the carrier density both increased when the gate voltage exceeded six volts, indicating the intercalation had occurred.
After the electrochemical doping, both the tungsten disulfide nanotube and flake devices showed superconductivity at low temperatures. After its development, this technique paved the way for researchers in condensed matter physics and material science to explore electric phase transitions, including electric-field-induced superconductivity and the structure phase transitions in a variety of materials. After watching this video, you should have a good understanding of how to use ionic liquid gating on solids for both electrostatic and electrochemical doping.
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